(1) Field of the Invention
The invention relates to field emission flat panel displays, and more particularly to methods for making a matrix addressed flat panel display having reduced capacitance and low power consumption, and the resulting display.
(2) Description of the Related Art
Field emission devices have been the subject of increased and renewed attention in recent years, as integrated circuit manufacturing techniques have allowed for miniaturization and new applications. Typically, one or many of a small, conical conductive emitter tip are formed on a conductive cathode. A second conductive surface is formed in close proximity and parallel to the cathode surface, with the two surfaces separated by a dielectric layer. Apertures are formed in the second surface and dielectric in the area of the emitter tips, with the opening in the second surface surrounding the upper part of the emitter. When a positive bias is applied at the second surface with respect to the cathode, electrons are emitted from the small emitter tip, with the current generated depending on the operating voltage, the sharpness of the tip and the emitter material work function.
One application for field emission devices is in the area of video displays, where there is an increasing need for flat, thin, lightweight displays to replace the traditional cathode ray tube (CRT) device. One of several technologies that provide this capability is field emission displays (FED). One such display is described in U.S. Pat. No. 4,857,161 by Borel et al. An array of very small, conical emitters is manufactured, typically on a semiconductor or glass substrate, and can be addressed via a matrix of columns and lines. These emitters are connected to parallel, conductive strips that form the cathode, and are surrounded at the tip by apertures in parallel conductive strips running perpendicular to the cathode strips, referred to as the gate. When the gate is positively biased with respect to the cathode at a particular emitter, by separate addressing means, electrons are emitted from the emitter tips at that location and attracted to an anode. The anode is typically mounted in close proximity to the cathode/gate/emitter structure and the area in between is evacuated. On the anode is cathodoluminescent material that emits light when excited by the emitted electrons, thus providing a display element.
One of the requirements for a video display is the need to provide a stable image, which in a CRT or a field emission display is accomplished by continual refreshing of the display elements, at a rapid speed. To sustain this speed the device must have a sufficiently low RC time constant, dependent on the resistance R and capacitance C of the display device elements. A lower capacitance could thus allow for a faster refresh and is desirable. And since power consumption in the display is also dependent in part on capacitance, lowering the capacitance can result in reduced power, which can be important in such applications as portable personal computers or other portable devices.
The problem and one solution to reducing the capacitance of a display using field emitters is discussed in U.S. Pat. No. 5,075,591 by Holmberg. It is noted that one means of reducing the capacitance is to increase the thickness of the dielectric layer between the cathode and gate. However, using the typical emitter formation process and a thicker dielectric will consume much more evaporated tip material and would place the emitter tip too far below the gate aperture. Holmberg describes a structure in which there is a sufficiently thin dielectric in the direct vicinity of the emitter tips, and a thicker dielectric in all other areas, thus reducing the overall capacitance of the display. However, this requires increased complexity in the manufacturing process.